NCC Slovenia and NCC Czechia invite you to an online High-level synthesis for FPGA (Field-Programmable Gate Array) workshop on 13-14 December 2023.
The purpose of this workshop is to teach participants how to create custom accelerators on FPGA using the C/C++ programming language instead of hardware description languages like VHDL (VHSIC Hardware Description Language) or Verilog. The workshop will use simple examples to demonstrate how to write kernels that can be synthesized on FPGA fabric, move data between the host and FPGA board, and optimize the design for speed and resource utilization. Participants will use the capabilities of HLS (High-Level Synthesis) to develop an accelerator for Cholesky matrix decomposition, using C/C++ programming language, OpenCL and XRT libraries for development on AMD-Xilinx FPGAs. Although the workshop is mainly for AMD-Xilinx FPGA boards, the skills and knowledge gained can be applied to FPGAs from other vendors as well.
